Future of Data Centers: Intel Showcases First-Ever Integrated Optical Chiplet

A few years ago, Intel introduced its rapid advancements in integrated photonics, which will enable the industry to completely reshape data center networks and architectures through optical connections. Subsequently, Intel Labs established the Interconnect Integrated Photonics Research Center, bringing together world-renowned photonics and circuit researchers from multiple universities to drive research and development in data center integrated photonics, paving the way for computing interconnects over the next decade.

Intel Corporation’s Integrated Photonics Solutions (IPS) Group has demonstrated the industry’s first fully integrated optical compute interconnect (OCI) chiplet co-packaged with an Intel CPU and running live data. Intel’s OCI chiplet enables co-packaged optical input/output in emerging AI infrastructure for data centers and high performance computing applications. (Credit: Intel Corporation)

Recently, Intel announced a revolutionary milestone in high-speed data transmission integrated photonics technology. At the 2024 Optical Fiber Communication Conference, they showcased the industry’s most advanced and the first-ever fully integrated optical compute interconnect (OCI) chiplet co-packaged with an Intel CPU and running real-time data.

Intel’s OCI chip represents a leap forward in high-bandwidth interconnects by enabling co-packaged optical I/O within emerging AI infrastructures in data centers and high-performance computing (HPC) applications. The OCI chip comprises a silicon photonics integrated circuit (PIC) with on-chip DWDM (dense wavelength division multiplexing) lasers and SOAs (semiconductor optical amplifiers) and an electrical integrated circuit (EIC) containing the entire optical I/O subsystem’s electronic components.

Thomas Liljeberg, Senior Director of Product Management and Strategy for Intel’s Integrated Photonics Solutions (IPS) group, stated that the first OCI chip utilizes 8 pairs of optical fibers, supports 64 channels, with each channel capable of 32Gbps bidirectional data transmission, totaling 4Tbps of bandwidth over a reach of up to 100 meters. This advancement is expected to meet the growing demand for higher bandwidth, lower power consumption, and longer reach in AI infrastructure, while also supporting future scalability for CPU/GPU/IPU cluster connections and novel computing architectures.